In a computer or processor architecture, a bus is a subsystem that transfers data between devices within an electronic device or transfers data between electronic devices. Bus architectures are also used in common data signalling paths for multiple devices rather than having separate connections between each set of devices that may communicate with one another. In other words, the bus structure can be used to allow one or more slave devices to communicate with one or more master devices.
For example, the I2C (Inter-Integrated Circuit) bus is a single-ended serial communication bus that is used to connect a low-speed electronic device to other electronic devices and allows for control of a wide variety of electronic devices. However, the I2C bus or I2C interface has a low bandwidth, limited capabilities and has no support for isochronous data streams. Therefore, several newer interfaces have been developed, which all have greater capabilities than the I2C interface. However, these newer interfaces are not backwards compatible with the I2C interface, which means these newer interfaces cannot control devices that communicate according to the I2C bus communication protocol, even though these newer interfaces have the required bandwidth and control capability.
Further aspects and features of the embodiments described herein will appear from the following description taken together with the accompanying drawings.